发明名称 Phase locked loop for stably operating in a matter that is insensitive to variation in process, voltage and temperature and method of operating the same
摘要 A phase locked loop for stably operating in a matter that is insensitive to variation in PVT and a method of operating the same. The PLL according to the present invention includes a PFD, a charge pump circuit, a loop filter, a VCO, and a peak voltage detector. The PFD compares a phase or frequency of a reference signal with a phase or frequency of an output signal and outputs an up signal or a down signal based on the comparison result. The charge pump circuit generates a pumping current in response to the up signal or the down signal and increases or decreases the pumping current in response to a detection signal. The loop filter outputs control voltage according to the pumping current. The VCO outputs the output signal having a frequency determined based on the control voltage. The peak voltage detector detects the peak value of the control voltage and outputs the detection signal based on the detection result. The PLL detects the peak value of control voltage and controls the operation of a charge pump circuit based on the detection result thereby decreasing the peaking and ringing phenomena of the control voltage and then stably operating in a manner that is insensitive to variation in PVT.
申请公布号 US7443249(B2) 申请公布日期 2008.10.28
申请号 US20060486136 申请日期 2006.07.14
申请人 HYNIX SEMICONDUCTOR INC. 发明人 SONG KEUN SOO
分类号 H03L7/08 主分类号 H03L7/08
代理机构 代理人
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