发明名称 Apparatus, system, and method for modifying memory voltage and performance based on a measure of memory device stress
摘要 An apparatus, system, and method are disclosed for modifying memory device timing and voltage. A detection module detects a change of memory device stress. A timing modification module modifies the memory device timing in response to the change of the memory device stress. In addition, a voltage modification module modifies the memory device voltage in response to the change of the memory device stress. In one embodiment, a processor pause module pauses the operation of a processor module while the timing modification module modifies the memory device timing and the voltage modification module modifies the memory device voltage.
申请公布号 US7444490(B2) 申请公布日期 2008.10.28
申请号 US20050148912 申请日期 2005.06.09
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 CASES MOISES;DE ARAUJO DANIEL N.;PHAM NAM HUU;ROUMBAKIS MENAS
分类号 G06F12/00;G06F11/00;G06F13/00;G06F13/28;G11C7/04;G11C11/34;G11C29/00;H01L35/00;H01L37/00;H03K3/42;H03K17/78 主分类号 G06F12/00
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