| 摘要 |
Improved memory devices, circuitry, and data methods are described that facilitate the detection and correction of data in memory systems or devices by encoding the data bits of a memory row or block in a non-systematic ECC code. This allows memory embodiments of the present invention to utilize reduced complexity error detection and correction hardware and/or routines to efficiently detect and correct corrupted user data in a segment of memory, such as a sector, word line row, or erase block. Additionally, in embodiments of the present invention user data is not stored in a plaintext format in the memory array, allowing for an increased level of data security. Further, in embodiments of the present invention, the ECC code is distributed throughout the stored data in the memory segment, increasing the robustness of the ECC code and its resistance to damage or data corruption.
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