| 摘要 |
<p>A method for forming an overlay vernier of a semiconductor device is provided to obtain a precise overlay measurement value by forming a sub son vernier in the periphery of a son vernier whose overlay value is to be measured. A lower layer(101) is formed on a semiconductor substrate(100). The lower layer is etched to form a mother vernier. An upper layer(103) is formed on the resultant structure. A son vernier(104a) and a sub son vernier(104b) are formed on the upper layer in a region where the mother vernier is formed wherein the sub son vernier is formed on the circumference of the son vernier. The son vernier and the sub son vernier can be made of a photoresist pattern. The mother vernier can be made of a convex structure.</p> |
