| 摘要 |
A power up signal generating circuit is provided to output a normal power up signal without causing an operation error when a supply voltage is turned on/off rapidly. A power up part generates a power up signal according to a supply voltage. A down part(300) performs down operation of an output voltage of the power up part when the output of the power up part is higher than the supply voltage by a fixed voltage. The down part comprises a first PMOS transistor receiving a voltage proportional to the supply voltage through a gate and the output of the power up part through a source. The power up part includes a resistor part(110) receiving the supply voltage, a first NMOS series part(120) comprising serially-connected NMOS transistors receiving the supply voltage through each gate, a first PMOS series part(130) receiving a voltage of a node connecting the resistor part and the first NMOS series part through a gate, and a second NMOS series part(140) receiving a voltage of a node connecting the resistor part and the first NMOS series part through a gate.
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