MEMORY DIAGNOSIS TEST CIRCUIT AND TEST METHOD USING THE SAME

摘要

A memory diagnosis test circuit and a test method using the same are provided to check a failure node of 6 transistors constituting an SRAM(Static Random Access Memory) cell. A memory core block(210) is arranged with a plurality of memory cells. A first shift register(230) selects one of word lines of the memory core block, in correspondence to a first input data signal inputted sequentially in response to a first clock signal. A second shift register(240) selects one of bit line pairs of the memory core block, in correspondence to a second input data signal inputted sequentially in response to a second clock signal. An analog mode control part(260) transmits the selected bit line pair data to a data line pair in response to an analog mode signal.