发明名称 SEMICONDUCTOR MEMORY DEVICE AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To prevent an electric short-circuiting between a substrate and a gate electrode of a circuit element of a single-layer gate structure in a semiconductor memory device having a 2-layer gate structure and the single-layer gate structure. SOLUTION: In a semiconductor memory device, the film thickness of a third gate electrode layer 43a of a circuit element of a single-layer gate structure is formed to be larger than the film thickness of a first gate electrode layer of a circuit element of a 2-layer structure. The upper surface of a second element isolation insulating film 14b having a second interelectrode insulating film 44a formed on its upper surface has a height nearly equal to the upper surface of the third gate electrode layer 43a. The upper surface of the second element isolation insulating film 14b exposed within an opening 45a of the second interelectrode insulating film 44a is higher than the upper surface of a semiconductor substrate 20. For this reason, there is no possibility of short-circuiting between the semiconductor substrate 20 and a fourth gate electrode layer 46a on the third gate electrode layer 43a in the circuit element of the single-layer gate structure. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008159785(A) 申请公布日期 2008.07.10
申请号 JP20060346171 申请日期 2006.12.22
申请人 TOSHIBA CORP 发明人 MORIKADO MUTSUO
分类号 H01L21/8247;H01L21/76;H01L27/10;H01L27/115;H01L29/788;H01L29/792 主分类号 H01L21/8247
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