发明名称 METHOD FOR TESTING A VARIABLE DIGITAL DELAY LINE AND A DEVICE HAVING VARIABLE DIGITAL DELAY LINE TESTING CAPABILITIES
摘要 <p>A device and a method for testing a variable digital delay line that includes multiple taps. The method (330) includes providing (320), an input signal to the variable digital delay line and finding (340), for each tap out of a group of tested taps of the variable digital delay line, a variable delay unit configuration that provides a delay that is closest to a delay introduced by the tap; wherein the variable digital delay line and the variable delay unit belong to the same integrated circuit.</p>
申请公布号 WO2008081347(A1) 申请公布日期 2008.07.10
申请号 WO2007IB50035 申请日期 2007.01.05
申请人 FREESCALE SEMICONDUCTOR, INC.;FEFER, YEFIM - HAIM;BOURGART, MIKHAIL;SOFER, SERGEY;WEIZMAN, YOAV 发明人 FEFER, YEFIM - HAIM;BOURGART, MIKHAIL;SOFER, SERGEY;WEIZMAN, YOAV
分类号 G01R31/28;G01R31/30 主分类号 G01R31/28
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