发明名称 SEMICONDUCTOR MEMORY
摘要 PROBLEM TO BE SOLVED: To produce a semiconductor memory mixedly installed with a DRAM, while the DRAM can be manufactured in an ormal CMOS process and manufactured at low production cost. SOLUTION: A one-bit memory cell 11 region is constituted of first and second transistors T1, T2 formed on a semiconductor substrate, two nodes SNt, SNc for holding cell data charges, and a shield electrode formed in its surrounding. Nodes SNt, SNc are connected to drains of the first and the second transistors T1, T2, respectively, and gates of the first and the second transistors T1, T2 are connected to the same word line WLO. Sources of the first and second transistors T1, T2 are connected to first and to second bit lines BLt0, BLc0, and the first and the second bit lines BLt0, BLc0 are connected to the same sense amplifier SA12 so that one-bit memory cell region is formed in an array in a two-dimensional way. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008159962(A) 申请公布日期 2008.07.10
申请号 JP20060348870 申请日期 2006.12.26
申请人 TOSHIBA CORP 发明人 FUKUDA MAKOTO;TAKASHIMA DAIZABURO
分类号 H01L21/8242;G11C11/405;H01L27/108 主分类号 H01L21/8242
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