| 摘要 |
A data communication system comprises a transmitter and a receiver. A plurality of current mode drivers at the transmitter are used to transmit clock and data signals to the receiver. A plurality of current mode sinks at the receiver are used to receive the transmitted clock and data signal. The present invention provides an improved current mode interface receiver with a process insensitive common mode current extraction circuit. The proposed common mode current extraction circuit will generate a current reference based on the received clock signal, so as to accurately interpret the received clock and data signals.
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