发明名称 SYNCHRONIZING CONTROLLER
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a synchronizing controller capable of synchronizing an operation of a desynchronizing circuit with an operation of a circuit as a criterion without making buffer size redundant. <P>SOLUTION: The synchronizing circuit is provided with: a first processing block which executes first processing and outputs a first instruction signal when the first processing is completed; a second processing block of the desynchronizing circuit which operates to change processing speed according to power to be supplied, executes second processing relevant to processing of the first processing block and outputs a second instruction signal when the second processing is completed; a control means for determining a power value to be supplied to the second processing block according to time difference of input timing between the first instruction signal and the second instruction signal and a supply means for supplying power according to the power value to the second processing block. <P>COPYRIGHT: (C)2008,JPO&INPIT</p>
申请公布号 JP2008160578(A) 申请公布日期 2008.07.10
申请号 JP20060348312 申请日期 2006.12.25
申请人 TOSHIBA CORP 发明人 TOMIZAWA TAKESHI;MATSUZAKI HIDENORI
分类号 H04L7/00 主分类号 H04L7/00
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