| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a spectrum diffusion clock generator (SSCG) capable of reducing disorder of clock duty ratio caused in a variable delay circuit. <P>SOLUTION: The SSCG comprises a first clock adjustment circuit which delays an input CLK by a predetermined unit delay time, and outputs a first adjustment CLK in which only the trailing edge of the input CLK is shifted forward in time according to the state of a first control signal; a second clock adjustment circuit which outputs a second adjustment CLK in which only the trailing edge of the first adjustment CLK is shifted backward in time according to the state of a second control signal; a variable delay circuit which delays the second adjustment CLK variably with the lapse of time according to the state of a selection signal and outputs a modulation CLK in which only L width is varied with the lapse of time with H-width being fixed; and a control circuit which is operated synchronously with the second adjustment CLK, outputs the first and second control signals based on a truth-value table of the cycle of the second adjustment CLK and a correction value thereof, and outputs the selection signal according to the cycle of the second adjustment CLK. <P>COPYRIGHT: (C)2008,JPO&INPIT</p> |
