发明名称 FLASH MEMORY AND ASSOCIATED METHODS
摘要 <p>In a method of operation, a flash memory cell is programmed, a word-line voltage is coupled to the flash memory cell, and a state of the flash memory cell is sensed at intervals to generate data to indicate a state of the flash memory cell. In a method of operation, a latch in a cache memory of a NAND flash memory is switched off, and the latch is initialized while the latch is switched off. A read voltage is coupled to a gate of a selected flash memory cell in the NAND flash memory where the selected flash memory cell is coupled to a bit-line, and the bit-line is coupled to an input of the latch while a voltage on the bit-line is changing.</p>
申请公布号 WO2008083125(A1) 申请公布日期 2008.07.10
申请号 WO2007US88743 申请日期 2007.12.21
申请人 INTEL CORPORATION;ELMHURST, DANIEL;SANTIN, GIOVANNI;INCARNATI, MICHELE;MOSCHIANO, VIOLANTE;DIIORIO, ERCOLE 发明人 ELMHURST, DANIEL;SANTIN, GIOVANNI;INCARNATI, MICHELE;MOSCHIANO, VIOLANTE;DIIORIO, ERCOLE
分类号 G11C16/02;G11C16/10 主分类号 G11C16/02
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