摘要 |
<p>In one embodiment, the present disclosure provides a method capable of processing a variety of different operations. A method according to one embodiment may include loading configuration data from a shared memory unit into a hardware configuration register, the hardware configuration register located within circuitry included within a hardware accelerator unit. The method may also include issuing a command set from a microengine to the hardware accelerator unit having the circuitry. The method may additionally include receiving the command set at the circuitry from the microengine, the command set configured to allow for the processing of a variety of different operations. The method may further include processing an appropriate operation based upon the configuration data loaded into the hardware configuration register. Of course, many alternatives, variations and modifications are possible without departing from this embodiment.</p> |
申请人 |
INTEL CORPORATION;FEGHALI, WAJDI;HIRNAK, STEPHANIE;RAGHUNANDAN, MAKARAM;BANSAL, YOGESH;YAP, KIRK;WOLRICH, GILBERT, M |
发明人 |
FEGHALI, WAJDI;HIRNAK, STEPHANIE;RAGHUNANDAN, MAKARAM;BANSAL, YOGESH;YAP, KIRK;WOLRICH, GILBERT, M |