| 摘要 |
In an embodiment of the invention, power consumption savings are realized in an array design. Such an array design, for example and not limitation, can be used in integrated circuits, including microprocessors as memory arrays, and or instruction cache arrays. Power consumption savings are realized in the array design by utilizing multiple gating modes to allow an early gating signal, late resolving gating signals, and/or specific encodings of way select signals to gate all of the array or a portion of the array saving power when it is determined the array output is not needed.
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