发明名称 |
METHOD AND APPARATUS FOR REDUCING LATENCY ASSOCIATED WITH READ OPERATIONS IN A MEMORY SYSTEM |
摘要 |
Methods and system for reducing latency associated with a read operation in a processor memory system are provided. In one implementation, the method includes receiving an early indicator corresponding to read data from a memory, delaying the early indicator in accordance with a pre-determined delay such that the early read indicator is passed to a bus in advance of the read data; and dynamically adjusting the pre-determined delay using an adjustment delay circuit, the pre-determined delay being adjusted responsive to a change in operational speed of the bus or change in operational speed of a processor coupled to the bus.
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申请公布号 |
US2008168293(A1) |
申请公布日期 |
2008.07.10 |
申请号 |
US20070621201 |
申请日期 |
2007.01.09 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
ALLEN JAMES J.;JENKINS STEVEN K.;MOSSMAN JAMES A.;TROMBLEY MICHAEL R. |
分类号 |
G06F1/12 |
主分类号 |
G06F1/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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