发明名称 INTEGRATED CIRCUIT PACKAGE SYSTEM
摘要 <P>PROBLEM TO BE SOLVED: To enhance integrated circuit densification and miniaturization, improve signal propagation velocity, reduce the entire integrated circuit size and wight, thereby improving performance. <P>SOLUTION: The integrated circuit package system 400 gives a first integrated circuit die 110, mounts a second integrated circuit die 112 by substantially deviating it in one-dimension from the die 110 on the die 110, forms a die interlayer layer 102 on the die 112, mounts a third integrated circuit die 114 by substantially positioning it to the die 112 on the layer 102, and further mounts a fourth integrated circuit die 116 by substantially deviating it from the die 114 substantially in the reverse direction in the same size as in the die 112 to the die 110 on the die 114. <P>COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008160119(A) 申请公布日期 2008.07.10
申请号 JP20070327757 申请日期 2007.12.19
申请人 STATS CHIPPAC LTD 发明人 CHIN CHEE KEONG
分类号 H01L25/065;H01L25/07;H01L25/18 主分类号 H01L25/065
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