| 摘要 |
PROBLEM TO BE SOLVED: To correct a voltage at an operation point between a load and a transistor, which form a differential pair. SOLUTION: Differential delay cells DDC 1 to DDC 4, respectively include: load control parts 1; bias sources 2; Nch MOS transistors NMT 11; Nch MOS transistors NMT 12; Pch MOS transistor PMT 11; and a Pch MOS transistor PMT 12. The Nch MOS transistors NMT 11 and NMT 12 form a differential pair for input of input signals. Each load control part 1 monitors the voltage (voltage at the operation point of the differential delay cell) in between the drain of the Pch MOS transistor PMT 12 and the drain of the Nch MOS transistor NMT 12 through the use of an ADC and a comparing part, and corrects the voltage of the operation point. COPYRIGHT: (C)2008,JPO&INPIT
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