| 摘要 |
PROBLEM TO BE SOLVED: To prevent a change in threshold of a peripheral transistor due to full silicide formation. SOLUTION: A memory cell MC is provided with a floating gate electrode 15a, a first inter-gate insulation film 16a arranged on the floating gate electrode 15a, and a control gate electrode 17a arranged on the first inter-gate insulation film 16a. An FET Tr is provided with a lower gate electrode 15b, a second inter-gate insulation film 16b that is arranged on the lower gate electrode 15b and has an opening, a block film 20 that is formed at least in the opening and has a function to block the dispersion of metal atoms, and an upper gate electrode 17b that is arranged on the second inter-gate insulation film 16b and is electrically connected with the lower gate electrode 15b through the block film 20. The control gate electrode 17a and the upper gate electrode 17b have a full silicide structure. COPYRIGHT: (C)2008,JPO&INPIT
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