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发明名称
在三维记忆体中之扩散阻障与用于执行此阻障之方法
摘要
一个或多个扩散阻障在三维或3D记忆单元中的一个或多个导体周围形成。该等扩散阻障允许该等导体包括非常低电阻率的材料,例如铜,其不易向外扩散进入周围区域,特别是在升高的加工温度下。藉由减轻该等导体尺寸缩小时所发生的电阻增加,使用较低电阻率的材料允许元件尺寸缩小。如此,在给定的区域内可制造更多的单元,因此提高所得记忆阵列的密度和储存容量。
申请公布号
TW200849562
申请公布日期
2008.12.16
申请号
TW097111290
申请日期
2008.03.28
申请人
山迪斯克3D有限公司
发明人
田中与一郎
分类号
H01L27/105(2006.01);H01L21/8239(2006.01)
主分类号
H01L27/105(2006.01)
代理机构
代理人
洪尧顺
主权项
地址
美国
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