发明名称 Size checking method and apparatus
摘要 A pair of edges that are located at ends as viewed in the widthwise direction of a design pattern are recognized. On the basis of the edge direction in which the paired edges are recognized, edge points on the design pattern are detected as sub-pixels. The widthwise dimension of the design pattern is calculated on the basis of the edge points. In addition, the widthwise dimension of a circuit pattern is calculated at the same position as the widthwise dimension of the design pattern. On the basis of the calculated widthwise dimensions, the semiconductor wafer circuit pattern is checked.
申请公布号 US7466854(B2) 申请公布日期 2008.12.16
申请号 US20050197501 申请日期 2005.08.05
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 SAWA EIJI;INOUE HIROMU
分类号 G01B11/02;G06K9/00;G01B11/24;G01B21/02;G03F1/84;G06F15/00;G06K9/36;G06K9/46;G06K9/48;G06K9/68;G06T7/00;H01L21/027;H04N7/18 主分类号 G01B11/02
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