发明名称 WAFER LEVEL CHIP SCALE PACKAGE OF SILICON IMAGE SENSOR USING THROUGH VIA PROCESS AND METHOD FOR MANUFACTURING THE SAME
摘要 A wafer level package of the silicon image sensor and a manufacturing method thereof are provided to decrease the thickness of the packaging without using the cover glass for protecting the image sensor. The wafer level chip size package of the silicon image sensor using the through via hole process comprise the image sensor, the electrode pad, the penetrating electrode(171), and the bump(200). The image sensor is formed on the front side of the substrate and converts the light which is income from the outside into the electric signal. The electrode pad is formed in the silicon wafer top of the substrate in order to output the electric signal transformed by the image sensor. The penetrating electrode delivers the electric signal outputted from the electrode pad to the rear side of the substrate. The bump is formed on the penetrating electrode.
申请公布号 KR20080108644(A) 申请公布日期 2008.12.16
申请号 KR20070056453 申请日期 2007.06.11
申请人 PARK, TAE SEOK 发明人 PARK, TAE SEOK;KIM, YOUNG SUNG
分类号 H01L23/12 主分类号 H01L23/12
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