Flash memory data storage apparatus

摘要

A flash memory data storage apparatus comprises a flash memory and a flash interface. The flash memory transceives data through a flash bus group. The flash interface includes first through n'th flash input buffers that transfer data to a host bus group in stages in response to first through n'th transfer clock control signals. An i'th flash input buffer provides data through i'th input-buffer bus groups in number of at least Ni. A bus width of each of the i'th input-buffer bus groups is wider than a bus width of each of an (i-l)'th input-buffer bus groups. A period of an i'th transfer clock control signal is longer than a period of an (i-1)'th transfer clock control signal. The Ni is obtained by dividing a bus width of the flash bus group by dividing the bus width of the flash bus group by the bus width of the each of the i'th input-buffer bus groups.