发明名称 Delta-sigma AD converter
摘要 The output of a first integrator is quantized in a quantizer. The quantized signal is subjected to D/A conversion, successively output to a plurality of output paths by a first switching circuit, sampled and held by a plurality of charge-holding circuits of a first feedback circuit, and successively output by a second switching circuit to one of the input terminals of a subtractor. On the other hand, the output signal of the first integrator is successively output by a third switching circuit to a plurality of output paths, sampled and held by a plurality of charge-holding circuits of a second feedback circuit, and successively input to the other input terminal of the subtractor by a fourth switching circuit along with signals held in an input portion, which samples and holds input analog signals. By doing so, a plurality of signals with different sampling timings are integrated accumulatively by the subtractor and the first integrator. When integration functions used to obtain an n-th order noise-shaping effect are multiplexed and operated using a single integrator, the integrator's current consumption can be suppressed.
申请公布号 US7466257(B2) 申请公布日期 2008.12.16
申请号 US20070898645 申请日期 2007.09.13
申请人 PANASONIC CORPORATION 发明人 AKIZUKI TAIJI;MAEDA TOMOAKI;ADACHI HISASHI
分类号 H03M3/00 主分类号 H03M3/00
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