发明名称 HIGH BREAKDOWN VOLTAGE MOS TRANSISTOR AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To reduce electric field concentration in a high breakdown voltage MOS transistor of a offset structure. SOLUTION: A silicon oxide film 19 is formed on the upper surface of an N type diffusion layer 12 (outside of the V shaped diffusion layer 12) between a P type diffusion layer 13 and an N type drain diffusion layer 17 on the N type diffusion layer 12, and the outer periphery of the silicon oxide film has tilted angles not smaller than 3 degrees and not larger than 30 degrees. Consequently, when a voltage BVdss is applied between a drain and a gate, the influence of a gate electrode 15 on the interior of silicon of the N type diffusion layer 12 slowly varies due to a variation in the thickness of the silicon oxide film 19. As a result, electric field concentration at an end of the silicon oxide film 19 is reduced to suppress an increase in electric field intensity, so that a breakdown when the impurity concentration of the N type diffusion layer 12 can be prevented. Thus a breakdown voltage BVdss can be increased while preventing increase of an ON resistance. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2008300516(A) 申请公布日期 2008.12.11
申请号 JP20070143419 申请日期 2007.05.30
申请人 SHARP CORP 发明人 FUKUSHIMA TOSHIHIKO
分类号 H01L29/78 主分类号 H01L29/78
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