发明名称 Semiconductor chip package
摘要 A semiconductor chip package includes a main board; a ceramic substrate having a cavity within which at least one chip is electrically mounted, the cavity being placed at a lower portion of the ceramic substrate facing the main board; and a conductive shielding layer provided with a predetermined thickness on the outside of the ceramic substrate. The ceramic substrate includes: at least one first ground line electrically connecting the conductive shielding layer with the main board; at least one second ground line electrically connecting the conductive shielding layer with the chip; and at least one signal line electrically connecting the chip with the main board. Thus, manufacturing costs are lowered because of the reduced number of components being used, miniaturization in device design can be achieved because of the small volume of the package, and the ground performance can be improved.
申请公布号 US2008303120(A1) 申请公布日期 2008.12.11
申请号 US20080155867 申请日期 2008.06.11
申请人 SAMSUNG ELECTRO-MECHANICS CO., LTD. 发明人 LEE TAE SOO;PARK YUN HWI
分类号 H01L23/552 主分类号 H01L23/552
代理机构 代理人
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