发明名称 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
摘要 <p><P>PROBLEM TO BE SOLVED: To reduce the erroneous writing to a memory cell MC0 caused by an excessive boost voltage of a channel in a NAND type flash memory. <P>SOLUTION: For example, when "1" is written in a memory cell MC, to precharge the channel, the select gate transistor SGD-Tr of a drain side is turned ON by a potential Vsg from a row control circuit. Simultaneously, the select gate transistor SGS-Tr of a source side is turned ON by a potential Vsg from the row control circuit to precharge the potential of the channel. Then, the potential of the channel is boosted by applying a potential Vpass from the row control circuit to wordlines WL1 to SL3 and a potential Vpgm to a wordline WLO. <P>COPYRIGHT: (C)2009,JPO&INPIT</p>
申请公布号 JP2008300019(A) 申请公布日期 2008.12.11
申请号 JP20070148205 申请日期 2007.06.04
申请人 TOSHIBA CORP 发明人 NAGASHIMA HIROYUKI;UENO HIROTAKA
分类号 G11C16/02;G11C16/04;G11C16/06 主分类号 G11C16/02
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