发明名称 COMPILING APPARATUS
摘要 The present invention effectively utilizes auxiliary registers and provides a compiler system which secures error detectability when the auxiliary registers are shared for plural uses. The instruction definition resource configuring unit configures, as preparation for processing by the register assigning unit, respective resources such as a register to be defined or referred to by for each instruction in an intermediate code. The instruction definition resource configuring unit detects possibility of instructions each of which is to be decomposed into plural instructions. As for an instruction to be possibly decomposed, the instruction definition resource configuring unit configures a corresponding register in the intermediate code, assuming the corresponding register used for the decomposition to be defined and referred. The register assigning unit uses the register as a general register as far as a live range of the register used for the decomposition does not overlap.
申请公布号 US2008307403(A1) 申请公布日期 2008.12.11
申请号 US20080048401 申请日期 2008.03.14
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 HEISHI TAKETO;MICHIMOTO SHOHEI;IIMURA YUKIO;YAMAMOTO YASUHIRO
分类号 G06F9/45;G06F9/30 主分类号 G06F9/45
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