| 摘要 |
An interactive debugging method in large digital system design is provided to reduce debugging-around time by overlapping a signal dumping process as to some simulation time section with a debugging GUI operation process as to another simulation time section in whole simulation time. An interactive debugging method in large digital system design comprises the following steps. In a verifying process in which one or more than one design error, which exists in a DUT or TB, are to be found through the at least one time execution of simulation, a signal dumping process using a space slice, and a debugging operation process overlapping method or a signal dumping process using a time slice are used.
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