发明名称 Generating and implementing a signal protocol and interface for higher data rates
摘要 A state machine for use in obtaining synchronization in an electronic system transferring digital data at a high rate between a host device and a client device over a communication path, the state machine configured to have at least one Acquiring Sync States synchronization states (4902,4906), and at least two In-Sync States synchronization states (4908,4910,4912), wherein one condition for shifting from an Acquiring Sync State to a first In-Sync State is detecting the presence of a synchronization pattern in the communication link and wherein a second condition for shifting from an Acquiring Sync State to a first In-Sync State is detecting the presence of a subframe header packet and good CRC value at a frame boundary (cond 61).
申请公布号 EP2001192(A2) 申请公布日期 2008.12.10
申请号 EP20080015936 申请日期 2004.06.02
申请人 QUALCOMM INCORPORATED 发明人 ANDERSON, JON JAMES;STEELE, BRIAN;WILEY, GEORGE A.;SHEKHAR, SHASHANK
分类号 H04L29/06;G06F3/14;H04L1/00;H04L1/24;H04L7/00;H04L7/04;H04L7/10;H04L12/64;H04L29/08;H04M1/725;H04N7/24 主分类号 H04L29/06
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