发明名称 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND FABRICATION METHOD FOR THE SAME
摘要 <p>A nonvolatile semiconductor storage device and a manufacturing method thereof are provided to stabilize the yield of the MONOS memory by preventing the electric short between the gate electrodes. A manufacturing method of the nonvolatile semiconductor storage device comprises the following processes: the first process of forming the second active area(16) in peripheral circuit region and the first active region(14) in the memory cell area by forming the element isolation layer apart from the memory cell area(11) and the peripheral circuit region(12) the border(13) of the peripheral circuit region and the memory cell area of the substrate; the second process of forming the bottom insulating layer and the interlayer charge trap layer consecutively; the third process of removing the part formed in the peripheral circuit region of the interlayer charge trap layer using the first mask film; the fourth process of forming at least a part of the upper insulating layer on the memory cell area; the fifth process of forming the gate electrode layer on the upper insulating layer and the gate insulating layer; the sixth process of forming the gate electrode of the peripheral transistor and the gate electrode of the memory cell by patterning the gate electrode layer.</p>
申请公布号 KR20080107247(A) 申请公布日期 2008.12.10
申请号 KR20080021411 申请日期 2008.03.07
申请人 PANASONIC CORPORATION 发明人 TAKAHASHI KEITA
分类号 H01L21/8247;H01L27/115 主分类号 H01L21/8247
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