CAPACITORLESS DRAM AND METHOD OF MANUFACTURING THE SAME

摘要

A capacitorless dram and a method of manufacturing the same are provided to increase the integration degree of the device by suppressing the increase of the junction leakage current even though the length of channel is decreased. A capacitorless DRAM comprises the substrate(200), the gate(210), and the hole storing units(40). The Substrate comprises the source(35a), and the drain(35b) and the channel(35c). The gate is formed on the channel of substrate. The hole storing unit is equipped under the channel. The hole storing unit comprises the other semiconductor layer and the hole storing unit(75) existing within the other semiconductor layer. The substrate includes the dielectric layer and the source and the drain which are formed on the dielectric layer.