发明名称 Controlling an accumulation of timing errors in a synchronous system
摘要 Apparatus (100) for communicating clock correction data between two or more clocked entities (102, 104) using a standardized clock correction unit or quanta. A source-native pre-scaler (302) can convert source-native clock correction values to scaled source-native clock correction values. The pre-scaler can perform this conversion by multiplying each source-native clock correction value by a factor N1. A source-native divider (308) can divide an adjusted source-native clock correction value by a value M1 to produce a standard quotient and a standard remainder. The standard quotient defines a standard clock correction value. Further, a source-native accumulator 306 can accumulate a sum comprised of the scaled source-native clock corrections and the standard remainder produced from the source-native divider. The sum can define the adjusted source-native clock correction value.
申请公布号 US7464285(B2) 申请公布日期 2008.12.09
申请号 US20060353618 申请日期 2006.02.14
申请人 HARRIS CORPORATION 发明人 LINN CHARLES A.
分类号 G06F1/04 主分类号 G06F1/04
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