发明名称 Microprocessor boot-up controller, nonvolatile memory controller, and information processing system
摘要 A processor boot-up controller includes: a volatile memory connected to a nonvolatile memory; a selector, which transfers boot-up codes to the volatile memory from the nonvolatile memory; a controller for the nonvolatile memory configured from a boot-up control sequencer, which transmits CPU read-in data to the CPU and brings the CPU into a wait state until boot-up code transfer completes; and an error detection and correction unit connected to the external CPU and the nonvolatile memory. The processor boot-up controls the CPU by reading data from the nonvolatile memory. The processor enables the CPU to access a SRAM in the shortest time in sync with the SRAM's ready timing, resulting in a reduction of average system boot-up time. An information processing system can use the controller for example for a nonvolatile memory, a microprocessor boot-up controller, and multi-valued nonvolatile memory.
申请公布号 US7464259(B2) 申请公布日期 2008.12.09
申请号 US20050084039 申请日期 2005.03.21
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 SUKEGAWA HIROSHI;SAKAUE KENJI;TSUNODA HITOSHI
分类号 G06F9/00;G06F11/10;G06F9/445;G06F12/00;G06F12/02 主分类号 G06F9/00
代理机构 代理人
主权项
地址