发明名称 POWER SAVING MEMORY APPARATUS, SYSTEMS, AND METHODS
摘要 Some embodiments include a voltage generator to generate a voltage to apply to a line used to access a memory cell of a memory device in which the voltage is applied to the line when the memory cell is not being accessed, and a power controller to cause the voltage to change during a time interval after a refresh operation of the memory device. Other embodiments including additional apparatus, systems, and methods are disclosed.
申请公布号 US2008298152(A1) 申请公布日期 2008.12.04
申请号 US20070754756 申请日期 2007.05.29
申请人 MICRON TECHNOLOGY, INC. 发明人 ITO YUTAKA;NOMURA MASAYOSHI;ABE KEIICHIRO
分类号 G11C7/00;G11C5/14 主分类号 G11C7/00
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