发明名称 METHOD FOR RAPID ESTIMATION OF LAYOUT-DEPENDENT THRESHOLD VOLTAGE VARIATION IN A MOSFET ARRAY
摘要 An automated method for estimating layout-induced variations in threshold voltage in an integrated circuit layout. The method begins with the steps of selecting a diffusion area within the layout for analysis. Then, the system identifies Si/STI edges on the selected area as well as channel areas and their associated gate/Si edges. Next, the threshold voltage variations in each identified channel area are identified, which requires further steps of calculating threshold voltage variations due to effects in a longitudinal direction; calculating threshold voltage variations due to effects in a transverse direction; and combining the longitudinal and transverse variations to provide an overall variation. Finally, a total variation is determined by combining variations from individual channel variations.
申请公布号 US2008301599(A1) 申请公布日期 2008.12.04
申请号 US20070757335 申请日期 2007.06.01
申请人 SYNOPSYS, INC. 发明人 MOROZ VICTOR;PRAMANIK DIPANKAR
分类号 G06F17/50 主分类号 G06F17/50
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