发明名称 |
CHARGE TRAP FLASH MEMORY DEVICE AND METHOD OF FABRICATING THE SAME |
摘要 |
<p>A charge trap flash EEPROM and a manufacturing method thereof are provided to simplify the manufacturing process using the GST as a charge trap layer. A charge trap flash EEPROM includes the semiconductor substrate(300), the tunneling insulating layer(330), the charge trapping layer(340), the blocking insulation film(350), and the control gate(360). The semiconductor substrate has the source region(310) and the drain region(320) which are divided by the channel region(370). The tunneling insulating layer is formed on the channel region of the semiconductor substrate. The charge trapping layer is made of the formed chalcogenide system compound thin film on the tunneling insulating layer. The blocking insulation film is formed on the charge trapping layer. The control gate is formed on the blocking insulation film.</p> |
申请公布号 |
KR20080105738(A) |
申请公布日期 |
2008.12.04 |
申请号 |
KR20070053722 |
申请日期 |
2007.06.01 |
申请人 |
SEOUL NATIONAL UNIVERSITY INDUSTRY FOUNDATION |
发明人 |
HWANG, CHEOL SEONG;CHOI, BYUNG JOON |
分类号 |
H01L27/115;H01L21/8247 |
主分类号 |
H01L27/115 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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