发明名称 ANALOG CORE AND DIGITAL CORE MIXED LOADING LSI TEST CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide an analog core and digital core mixed loading LSI test circuit which is capable of test operation through actual operation path by using a flip flop action which is switching set or reset by a test control signal in a digital circuit part testing the core to be tested. SOLUTION: In a LSI test circuit consisting of a digital core 2 which is supplying data and a control signal to an analog core 3 and the analog core 3 which is a test circuit to be tested, the digital core 2 is supplied with a test mode set signal, and supplied with a test mode set decoder 4 outputting each test mode signal selecting the analog core 3, and plural test data signals and test mode signal. Further, a logic circuit group 7 which outputs a test control set signal and a test control reset signal is prepared. Actual control or data signal is supplied to a data terminal. A clock signal is supplied to a clock terminal. The test control set signal is supplied to a set terminal. The test control reset signal is supplied to a reset terminal. Moreover, a flip flop group 8 is prepared with a set/reset function in which the control signal is supplied to the analog core. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2008292400(A) 申请公布日期 2008.12.04
申请号 JP20070140433 申请日期 2007.05.28
申请人 SHARP CORP 发明人 KUBO MASAFUMI
分类号 G01R31/28;G01R31/316;H01L21/822;H01L27/04 主分类号 G01R31/28
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