| 摘要 |
A semiconductor memory device includes a silicon pillar, a gate electrode covering a side surface of the silicon pillar via a gate insulation film, diffusion layers (11, 12) provided in a lower part and an upper part, respectively of the silicon pillar, a bit line connected to the diffusion layer (11), and a memory element connected to the diffusion layer (12). The bit line includes a silicon material region in contact with the diffusion layer (11), and a low-resistance region including a material having lower electric resistance than that of the silicon material region. As a result, the resistance of the bit line embedded in the substrate can be decreased.
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