SEMICONDUCTOR MEMORY DEVICE

摘要

A semiconductor memory device increase sensing sensitivity by making the impedance between the sense amplifier and an input-output line and impedance between a complementary input-output line and the sense amplifier identical. In a semiconductor memory device, a first and second bit line are coupled with a plurality of memory cells formed in the first memory cell array region, and a first and second complementary bit line are coupled with a plurality of memory cells formed in the second memory cell array region. A first and the second column selection transistor are formed at a first sense circuit area and couple the first bit line and a fist complementary bit line with the first input-output line and the first complementary bit line respectively. A third and the fourth column selection transistor are formed at a second sense circuit area and couple the second bit line and second complementary bit line with the second input-output line and the second complementary bit line respectively.