| 摘要 |
<P>PROBLEM TO BE SOLVED: To achieve a composite IC package and a manufacturing method thereof wherein the deficiency of external connection terminals can be improved without increasing the package size. <P>SOLUTION: In the composite IC package 1 having an SOI substrate 11 whereon a CMOS 12 as a logical element, a bipolar transistor 13, and an LDMOS 14 as a power element are packaged together, bumps 16 connected electrically with the CMOS 12 and the bipolar transistor 13 and electrode plates 18 connected electrically with the LDMOS 14 are formed respectively on the different surfaces of the SOI substrate 11. <P>COPYRIGHT: (C)2009,JPO&INPIT |
