| 摘要 |
PROBLEM TO BE SOLVED: To properly achieve even the data transfer of an ATAPI while actualizing the bus bridge function of an ATA and an SATA. SOLUTION: A data transfer controller contains a PATAI/F10 connected to a PATA bus, an SATAI/F50 connected to an SATA bus and a sequence controller 30 conducting a transfer sequence control. The PATAI/F10 has a TFR (a task file register) 12. The sequence controller 30 holds a transmission to a device 4 of a register FIS corresponding to an ATA packet command published by a host 2, and conducts a dummy setting publishing an ATAPI packet command to the host 2 to the TFR 12. The host 2 publishes the ATAPI packet command, and the register FIS corresponding to the ATA packet command is transmitted to the device 4. COPYRIGHT: (C)2009,JPO&INPIT
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