POLY PRE-DOPING ANNEALS FOR IMPROVED GATE PROFILES
摘要
A semiconductor process and apparatus uses a predetermined sequence of patterning and etching steps to etch a gate stack (32) formed over a substrate (11), thereby forming an etched gate (92, 94) having a vertical sidewall profile by implanting the gate stack (32) with a nitrogen (42) and a dopant (52) and then heating the polysilicon gate stack (32) at a selected temperature using rapid thermal annealing (62) to anneal the nitrogen and dopant so that subsequent etching of the polysilicon gate stack (32) creates an etched gate (92, 94) having more idealized vertical gate sidewall profiles.
申请公布号
WO2007098302(A3)
申请公布日期
2008.12.04
申请号
WO2007US60654
申请日期
2007.01.18
申请人
FREESCALE SEMICONDUCTOR INC.;SHROFF, MEHUL D.;HALL, MARK D.;GRUDOWSKI, PAUL;STEPHENS, TAB A.;STOUT, PHILLIP J.;ADETUTU, OLUBUNMI O.
发明人
SHROFF, MEHUL D.;HALL, MARK D.;GRUDOWSKI, PAUL;STEPHENS, TAB A.;STOUT, PHILLIP J.;ADETUTU, OLUBUNMI O.