CHARGE PUMP CIRCUIT AND SLICE LEVEL CONTROL CIRCUIT

摘要

The invention provides a charge pump circuit which reduces rise time of an output current even when an input signal is of high frequency. PMOS1 and PMOS2 have gates connected to each other, and the gate of the PMOS1 is connected to the drain thereof. A supply potential (Vdd) is applied to the sources of the PMOS1 and the PMOS2, and the PMOS1 and the PMOS2 form a current mirror circuit. First and second switching elements and a first constant-current source are connected to the drain of the PMOS2. A connection point (a node) of the first switching element and the second switching element is connected to an output terminal. The drain of the PMOS1 is connected to the first constant-current source through a third switching element, and connected to a second constant-current source through a fourth switching element.