发明名称 Performance Analysis Based System Level Power Management
摘要 A multiprocessor system-on-chip 102 with dynamic adaptive power management for execution of data-dependent applications comprises strategically placed performance counters to collect run-time performance requirements of tasks. A power manager 130 issues DVS 132, DFS 134, time-out 136, and other controls to the various system resources being monitored. As the tasks execute during run-time, the quality of the match between the task and the resource it was scheduled to is analyzed. More accurate power controls and schedules are then made available and stored in a performance requirements table. The power-management is therefore adaptive and dynamic. During a static analysis phase, applications and tasks that can be pre-characterized for their performance requirements are profiled and pre-loaded as initial starting points for correction during run-time.
申请公布号 US2008301474(A1) 申请公布日期 2008.12.04
申请号 US20060158996 申请日期 2006.12.21
申请人 NXP B.V. 发明人 BUSSA NAGARAJU;DHAND HARSH;SRINIVASAN BALAKRISHNAN
分类号 G06F1/32 主分类号 G06F1/32
代理机构 代理人
主权项
地址