发明名称 |
Program counter adjustment based on the detection of an instruction prefix |
摘要 |
<p>A processor (e.g., a co-processor) comprising a decoder coupled to a pre-decoder, in which the decoder decodes a current instruction in parallel with the pre-decoder pre-decoding a subsequent instruction. In particular, the pre-decoder examines at least five Bytecodes in parallel with the decoder decoding a current instruction. The pre-decoder determines if a subsequent instruction contains a prefix. If a prefix is detected in at least one of the five Bytecodes, a program counter skips the prefix and changes the behavior of the decoder during the decoding of the subsequent instruction.</p> |
申请公布号 |
EP1387256(A3) |
申请公布日期 |
2008.12.03 |
申请号 |
EP20030291920 |
申请日期 |
2003.07.30 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED;TEXAS INSTRUMENTS FRANCE |
发明人 |
CHAUVEL, GERARD;LASSERE, SERGE;KUUSELA, MAIJA |
分类号 |
G06F9/32;G06F9/30;G06F9/318;G06F12/02;G06F12/08;G06F12/12 |
主分类号 |
G06F9/32 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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