发明名称 Data handover unit for transferring data between different clock domains by parallelly reading out data bits from a plurality of storage elements
摘要 The invention provides a data handover unit for transferring data from a furst clock domain to a second clock domain, comprising: a first clock unit operable to supply a first clock signal; a selector stage operable to sample an incoming data stream with respect to the first clock signal; a second clock unit operable to supply a second clock signal; a storage unit coupled with the selector stage, wherein the storage unit has a first plurality of storage elements each of which is operable to store one bit of data of the sampled data stream, an output unit for parallelly reading out a fram of data from a second plurality of storage elements included in the first plurality of storage elements with respect to the second clock signal, wherein the selector stage is further operable to successively write the data bits of the sampled data stream into the first plurality of storage elements and to store the respective data bits of the sampled data stream in the respective storage elements until they were read out by the output unit.
申请公布号 US7461186(B2) 申请公布日期 2008.12.02
申请号 US20060346993 申请日期 2006.02.03
申请人 INFINEON TECHNOLOGIES AG 发明人 STREIBL MARTIN;GREGORIUS PETER;SCHLEDZ RALF;RICKES THOMAS;GU ZHENG
分类号 G06F13/38;G06F11/00 主分类号 G06F13/38
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