发明名称 Cell with fixed output voltage for integrated circuit
摘要 The invention relates to a testable integrated circuit. In order to replace ground and VDD in certain points of such a circuit, the circuit comprises a cell (34) which comprises a flipflop (11) and means (31) able to set the output voltage of the cell when the circuit is in the operation mode. These means for setting the output voltage are controlled by a control signal (15) which depends on the mode signal that indicates whether the signal is in the test mode or in the operation mode.
申请公布号 US7459928(B2) 申请公布日期 2008.12.02
申请号 US20040514902 申请日期 2004.11.17
申请人 NXP B.V. 发明人 DA SILVA PATRICK;SOUEF LAURENT
分类号 H01L27/04;H03K19/20;G01R31/3185;H01L21/822;H03K17/00;H03K19/00 主分类号 H01L27/04
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