摘要 |
An integrated circuit includes a first I/O cell (201) disposed at a substrate, the first I/O cell including a first electrostatic discharge (ESD) clamp transistor device (230). The first ESD clamp transistor device includes a control electrode, a first current electrode coupled to a first voltage reference bus, and second current electrode coupled to a second voltage reference bus. The first ESD clamp transistor device (230) has a first channel width. The integrated circuit further includes a second I/O cell (209) including a second ESD clamp transistor device (236). The second ESD clamp transistor device (236) includes a control electrode, a first current electrode coupled to the first voltage reference bus, and second current electrode coupled to the second voltage reference bus. The second ESD clamp transistor device has a second channel width different than the first channel width. |
申请人 |
FREESCALE SEMICONDUCTOR INC.;MILLER, JAMES W.;ETHERTON, MELANIE;KHAZHINSKY, MICHAEL G.;STOCKINGER, MICHAEL |
发明人 |
MILLER, JAMES W.;ETHERTON, MELANIE;KHAZHINSKY, MICHAEL G.;STOCKINGER, MICHAEL |