发明名称 SHARED MEMORY SWITCHING CIRCUIT AND SWITCHING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a shared memory switching circuit which can be released into the market early and increase memory capacity at a low cost. SOLUTION: An FPGA is equipped with a first selector 26 and a second selector 27. When a first CPU 11 and a second CPU 21 use a first shared memory 22, a first INTR and a first BUSYR are selected by the first selector 26 and outputted to the first CPU, and a first INTL and a first BUSYL are selected by the second selector 27 and outputted to the second CPU. When the first CPU 11 and the second CPU 21 use a second shared memory 24, a second INTR and a second BUSYR are selected by the first selector 26 and outputted to the first CPU, and a second INTL and a second BUSYL are selected by the second selector 27 and outputted to the second CPU. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2008287571(A) 申请公布日期 2008.11.27
申请号 JP20070132863 申请日期 2007.05.18
申请人 YASKAWA ELECTRIC CORP 发明人 OSAWA KAZUMASA
分类号 G06F12/06;G06F12/00 主分类号 G06F12/06
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